About Me
Hao Zheng is a tenure-track assistant professor in the Department of Electrical and Computer Engineering at the University of Central Florida.
Hao Zheng received his Ph.D. degree from George Washington University, advised by Prof. Ahmed Louri. He received his B.S. in Electrical Engineering from Beijing Jiaotong University, China. His research interests are in the areas of computer architecture, with emphasis on on/off-chip interconnects, energy-efficient many-core architecture, chiplet-based system, AI/ML accelerators, and technology-driven architecture. His work has been published in top-tier computer architecture and EDA conferences and journals such as ISCA, MICRO, HPCA, DAC, ICCAD, DATE, TPDS, and TETC.
Hiring
I have one Ph.D. opening in Fall 2025. If you are interested, please do not hesitate to send your CV and Transcripts to Hao.Zheng@ucf.edu. Prospective students are encouraged and welcomed to contact current lab members to understand our lab culture before submitting their applications.
Lab News
11/2024 One paper is accepted (with shepherding) in HPCA'25.
07/2024 One paper is accepted in MICRO'24.
06/2024 One paper is accepted in ICCAD'24.
03/2024 One paper is accepted in ISCA'24.
02/2024 Two papers are accepted in DAC'24.
01/2024 One paper is accepted in IPDPS'24.
08/2023 One paper is accepted in ICCD'23.
07/2023 Three papers are accepted in ICCAD'23.
03/2023 One paper is accepted in ISCA'23.
02/2023 One paper is accepted in DAC'23.
Selected Publications
[MICRO'24] Lingxiang Yin, Sanjay Gandham, Mingjie Lin, Hao Zheng, “SCALE: A Structure-Centric Accelerator for Message Passing Graph Neural Networks”, in Proceedings of IEEE/ACM International Symposium on Microarchitecture (MICRO), Austin, Texas, November 2-6, 2024.
[ICCAD'24] Sanjay Gandham, Joe Walston, Sourav Samanta, Lingxiang Yin, Hao Zheng, Mingjie Lin, Stelios Diamantidis, "CircuitSeer: RTL Post-PnR Delay Prediction via Coupling Functional and Structural Representation", in Proceedings of ACM/IEEE International Conference on Computer-Aided Design (ICCAD), New Jersey, USA, Oct 27-21, 2024.
[DAC'24] Fangzhou Ye, Lingxiang Yin, Amir Ghazizadeh Ahsaei, Hao Zheng "EGMA: Enhancing Data Reuse and Workload Balancing in Message Passing GNN Acceleration via Gram Matrix Optimization", in Proceedings of 61th Design Automation Conference (DAC’24), San Francisco, June 23-27, 2024.
[DAC'24] Shilin Tian, Chase Szafranski, Ce Zheng, Fan Yao, Ahmed Louri, Chen Chen, Hao Zheng "VITA: ViT Acceleration for Efficient 3D Human Mesh Recovery via Hardware-Algorithm Co-Design", in Proceedings of 61th Design Automation Conference (DAC’24), San Francisco, June 23-27, 2024.
[ICCAD'23] Lingxiang Yin, Amir Ghazizadeh, Ahmed Louri, Hao Zheng, "ARIES: Accelerating Distributed Training in Chiplet-based Systems via Flexible Interconnects", in Proceedings of International Conference on Computer-Aided Design (ICCAD), San Francisco, CA, October 29 - November 2, 2023.
[ICCAD'23] Sanjay Gandham*, Lingxiang Yin*, Hao Zheng, Mingjie Lin, ''SAGA: Sparsity-Agnostic Graph Convolutional Network Acceleration with Near-optimal Workload Balance", in Proceedings of International Conference on Computer-Aided Design (ICCAD), San Francisco, CA, October 29 - November 2, 2023. (* Co-first Authors)
[ICCAD'23] Muhammad Rashedul Haq Rashed, Sven Thijssen, Hao Zheng, Sumit Kumar Jha, Rickard Ewetz, ''Path-based Processing using In-Memory Systolic Arrays for Accelerating Data-Intensive Applications", in proceedings of International Conference on Computer-Aided Design (ICCAD), San Francisco, CA, October 29 - November 2, 2023.
[DAC'23] Jiaqi Yang, Hao Zheng, and Ahmed Louri, “Venus: A Versatile Deep Neural Network Accelerator Architecture Design for Multiple Applications,” in Proceedings of 60th Design Automation Conference (DAC’23), San Francisco, July 9-13, 2023.
[ISCA'23] Jiajun Li, Yuxuan Zhang, Hao Zheng, and Ke Wang, “ FDMAX: An Elastic Accelerator Architecture for Solving Partial Differential Equations,” in Proceedings of 50th International Symposium on Computer Architecture (ISCA'50), Orlando, FL, June 17–21, 2023.
[HPCA'21] Hao Zheng, Ke Wang, and Ahmed Louri, "Adapt-NoC: A Flexible Network-on-Chip Design for Heterogeneous Manycore Architecture", in Proceedings of the 27th IEEE International Symposium on High-Performance Computer Architecture (HPCA'21), Seoul, South Korea, Feb. 27 - Mar. 3, 2021.
[DAC'20] Hao Zheng, Ke Wang and Ahmed Louri, “A Versatile and Flexible Chiplet-based System Design for Heterogeneous Manycore Architectures,” in Proceedings of 57th Design Automation Conference (DAC’20), Virtual Conference, July 19-23, 2020.
[DAC'19] Hao Zheng and Ahmed Louri, “An Energy-Efficient Network-on-Chip Design using Reinforcement Learning,” in Proceedings of 56th Design Automation Conference (DAC’19), Las Vegas, NV, June 2-6, 2019.
Patents
Hao Zheng and Ahmed Louri, "EZ-Pass: An Energy & Performance-Efficient Power-Gating Router Architecture for Scalable NoCs.", U.S. Patent, US 11502934 B2, Granted, Nov. 2022
Hao Zheng, Ke Wang, and Ahmed Louri,, "A Versatile and Flexible Interconnection Network Design for Chiplet-Based Manycore Architecture", U.S. Patent, US 11489788 B2, Granted, Nov. 2022
Jiaqi Yang, Hao Zheng, Ahmed Louri, "Versatile Accelerator Design for Multiple Deep Neural Network Applications", U.S. Patent, 63/665,776, Filed, Pending, July 2024.
Ke Wang, Hao Zheng, and Ahmed Louri, “Learning-Based High-Performance, Energy-Efficient, and Secure Interconnection Design Framework”, No. 63/019,720, U.S. Patent, Pending, filed May 2020.
Professional Activities
Program Committee: ICCAD'24; DAC'24-25; GLSVLSI'24; IPDPS'23-24; IISWC'23; SRC@ASP-DAC'23; HiPC'22; NAS'22;
Organization Committee: Finance Chair, ISCA'23 ; Artifact Evaluation Co-Chair, IISWC'23; Registration Chair, ICCD'23; Local Arrangement Co-Chair, IPDPS'23; Web Chair, HPCA'19;
Session Chair: ICCAD'23; ICCD'23; IPDPS'23;
Journal Reviewer: IEEE Transactions on Computers; ACM/IEEE Transactions on Networking; IEEE Transactions on Cloud Computing; IEEE Transactions on Circuits and Systems II; IEEE Transactions on Sustainable Computing; IEEE Transactions on Very Large Scale Integration (VLSI); IEEE Micro; IEEE Computer Architecture Letter;
Awards
ECE Best Dissertation Award, GWU, 2022
Best Paper Finalist, Design Automation Conference, 2020
First Place in ECE, SEAS R&D Showcase, 2019
First Place in Engineering, GWU Research Days, 2019
NSF GW I-Corps Site Grant Award, 2019
Dean Summer Award Fellowship, 2018
Second Place in Engineering, GWU Research Days, 2018
Phillip/Temofel Sprawcew Endowment Scholarship, 2017
